Showing posts with label Generator. Show all posts

Negative Ion Generator 555 Timer

This negative ion generator is a high voltage generator circuit that use a 555 timer circuit to generate square-wave pulses. The square wave pulses are applied to the Q1 transistor ( Tip120 ) that provide enough current to the Q2 (2N3055) transistor to turn it on.

Negative Ion Generator 555 Timer Circuit Diagram:

Each time when the Q2 transistor is turned on current flows through the high voltage auto-transformer, T2 ,to the a 10 kilovolt high voltage diode (D1 IMD5210). The polarity of the D1 IMD5210 diode is biased to place a negative charge on C3 and C4, leaving the discharge point negatively charged.

Voltage from the discharge point negatively charges the air forced past it by the fan.
The output of the T1 transformer must provide 12 volts . Be careful if you want to construct this project , may be dangerous.

Light Dependent Tone Generator 555 Timer

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Here is a very simple 555 timer circuit Light dependent tone generator is presented in this circuit diagram. What is so special at this 555 timer IC project? this circuit use a LDR (light dependent resistor) to modify the frequency of the circuit.

Light Dependent Tone Generator 555 Timer Circuit Diagram:

If the circuit is placed in a constant light the speaker will emit a sound with a constant frequency but we change the intensity of the light the circuit will generate a sound with a frequency that depends of light intensity. If the tone generator circuit is placed in a dark place the circuit don’t emit any sound.

The 555 timer IC is connected in a astable mode and the oscillation time depends of the R1, R2, C1 components value . The speaker connected at the output terminals of the circuit must have a 8 ohms impedance and a power between 0.2-0.5 watts.

The transistor used in this tone generator circuit must be BD136, 2N2905 type or equivalent .

Tone Burst Generator

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This is simple Electronic Circuit Diagram of Tone Burst Generator Circuit. Integrated circuit gates ICl-a and TCl-b form a monostable, whose time constant is determined by C2 and R3. When the transmitter is dekeyed (and then almost immediately rekeyed) point TX+ goes low and takes pin 1 low for a short time. This triggers the start of the timing period controlled by C2/R3. The capacitor C2, charges via R3 until the trigger point of gate ICl-b is reached. At this point, the monostable changes state and pin3 goes low again. On the prototype, this time was about 700 ms. The pulse occurs each time after dekeying and it is normally inaudible.

Tone Burst Generator Circuit Diagram:

If, however, point TX+ goes high again (as in immediate rekeying) the monostable is still in the enabled state and the oscillations of ICl-c are present in the transmission. During this time period, the buffer gate, ICl-d, is enabled and the tone is therefore passed to the output.

Simple Marker Generator

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Here are a Simple Electronic Schematic Circuit Project of Marker Generator. The marker generator circuit explained here is a constant- frequency oscillator driving into a CMOS divider chain. Switchable out- puts from the divider chain are selected to drive a pulse generator. The oscillator is C1a in which R1 biases the IC into linear operation. The crystal determines the basic frequency of operation at 4 MHz in conjunction with C1, 2, 3 and 4 which appear to the crystal as one parallel capacitor.

Simple Marker Generator Circuit Diagram:

The capacitor C2 is used to tune the oscillator exactly to frequency as explained in the text. The resistor R2 adds extra phase shift but also reduces the gain. Thus if the oscillator is slow in starting reducing R2 may help. The output of the oscillator is buffered from the rest of the circuit by IC1 /b. lC2 is a CMOS dual type D flip flop that divides the 4 MHz by four to provide an out put of 1 MHz, the 2 MHz also being brought out.

A further dual division by 10 is provided by lC3 which therefore provides outputs of 100 kHz and 10 kHz. The required output is selected by SW1 and applied to C5 and R3 which differentiate the square wave output of the divider. The waveform is then amplified and squared by IC1/c to provide an output train of narrow pulses, the amplitude of which may be varied by means of RV1.

Tuning Fork Sound Generator

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This is a simple electronic circuit project of electronic tuning fork sound generator circuit. A standard tuning fork produces a tone of 440 Hz, that is, the inter- national A (orchestral pitch). lt is not very difficult to make an electronic alternative. An oscillator, a divider, a loudspeaker and a battery are all that is required.

Tuning Fork Sound Generator Circuit Diagram:

To be useful, an electronic tuning fork must, of course, be a compact unit. As the use of special, and therefore mostly, crystals was precluded, a little research showed that it would be possible to use relatively simple and standard components. It appeared that the required frequency can be derived from a readily avail- able 1 MHZ crystal which, by means of a trimmer, can be pulled to 1,000,120 Hz which is the nearest frequency containing a whole number times 440 Hz. The oscillator is constructed a- round gates N1, N2 and tuned to 1,000,120 Hz (with a frequency counter if possible), by means of trimmer C2.

The oscillator output is fed to lC2 which divides bv 2273 r2° + 25 + 26 + 27 + 2*1).A practcally symmetrical signal of 440 Hz is then available at output O11 of lC2. This signal is tjgien buffered by gates N3 . . . N6 and the balanced output stage gives a level sufficient to drive a small loudspeaker. ln spite of the current consumption of 65 mA, a standard 9 V battery (preferably alkaline-manganese) will suffice, because tuning forks are by their nature used for short periods only. lf the fork is used for longer periods, it might be advisable to consider a rechargeable battery.

Generating Long Time Delays

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Generating long delays of several hours can be accomplished by using a low frequency oscillator and a binary counter as shown below. A single Schmitt Trigger inverter stage (1/6 of 74HC14) is used as a squarewave oscillator to produce a low frequency of about 0.5 Hertz. The 10K resistor in series with the input (pin 1) reduces the capacitor discharge current through the inverter input internal protection diodes if the circuit is suddenly disconnected from the supply.

Generating Long Time Delays Circuit diagram

This resistor may not be needed but is a good idea to use. The frequency is divided by two at each successive stage of the 12 stage binary counter (CD4040) which yields about 1 hour of time before the final stage (Q12) switches to a high state. Longer or shorter times can be obtained by adjusting the oscillator frequency or using different RC values.

Each successive stage changes state when the preceding stage switches to a low state (0 volts), thus the frequency at each stage is one half the frequency of the stage before. Waveform diagrams are shown for the last 3 stages. To begin the delay cycle, the counter can be reset to zero by momentarily connecting the reset line (pin 11) to the positive supply. Timing accuracy will not be as good as with a crystal oscillator and may only be around 1 or 2% depending on the stability of the oscillator capacitor.